A simple reconfigurable microprocessor in a 36 macrocell CPLD
| dc.contributor.author | Wijesinghe, W.A.S.^iDepartment of Electronics, Faculty of Applied Sciences, Wayamba University of Sri Lanka^pMakandura | |
| dc.contributor.author | Jayananda, M.K.^iCentre for Instrument Development, Department of Physics, Faculty of Science, University of Colombo^pColombo | |
| dc.contributor.author | Sonnadara, D.U.J.^iCentre for Instrument Development, Department of Physics, Faculty of Science, University of Colombo^pColombo | |
| dc.date.accessioned | 2026-07-09T15:41:12Z | |
| dc.date.issued | 2011 | |
| dc.identifier.citation | Journal of the National Science Foundation of Sri Lanka, 39(3):p.261-266 | |
| dc.identifier.uri | http://vidya.nsf.gov.lk:8080/pdfs/JNSF-39(3)/JNSF39_3_261.pdf | |
| dc.identifier.uri | https://viduketha.nsf.gov.lk/handle/123456789/715 | |
| dc.language.iso | English | |
| dc.publisher | NSF:Colombo | |
| dc.subject | Information Communication Technology | |
| dc.subject | Data acquisition | |
| dc.subject | Complex programmable logic device (CPLD) | |
| dc.subject | Field programmable gate arrays (EPGA) | |
| dc.subject | Microcontrollers | |
| dc.subject | Reconfigurable computing | |
| dc.subject | Hardware description language | |
| dc.subject | VHDL | |
| dc.title | A simple reconfigurable microprocessor in a 36 macrocell CPLD | |
| dc.type | Article |
